Author: evancheng
Date: Wed Feb 13 03:13:21 2008
New Revision: 47058

URL: http://llvm.org/viewvc/llvm-project?rev=47058&view=rev
Log:
Simplify.

Modified:
    llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp

Modified: llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp?rev=47058&r1=47057&r2=47058&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetInstrInfoImpl.cpp Wed Feb 13 03:13:21 2008
@@ -23,11 +23,9 @@
          "This only knows how to commute register operands so far");
   unsigned Reg1 = MI->getOperand(1).getReg();
   unsigned Reg2 = MI->getOperand(2).getReg();
-  MachineOperand &MO = MI->getOperand(0);
-  bool UpdateReg0 = MO.isReg() && MO.getReg() == Reg1;
   bool Reg1IsKill = MI->getOperand(1).isKill();
   bool Reg2IsKill = MI->getOperand(2).isKill();
-  if (UpdateReg0) {
+  if (MI->getOperand(0).getReg() == Reg1) {
     // Must be two address instruction!
     assert(MI->getDesc().getOperandConstraint(0, TOI::TIED_TO) &&
            "Expecting a two-address instruction!");


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