Author: johannes Date: Fri Feb 15 12:09:51 2008 New Revision: 47162 URL: http://llvm.org/viewvc/llvm-project?rev=47162&view=rev Log: Remove warning about 64-bit code on processor that doesn't support it. Per Chris.
Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp llvm/trunk/lib/Target/X86/X86Subtarget.cpp Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=47162&r1=47161&r2=47162&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Fri Feb 15 12:09:51 2008 @@ -83,8 +83,6 @@ // If we are generating code for ppc64, verify that options make sense. if (is64Bit) { if (!has64BitSupport()) { - cerr << "PPC: Generation of 64-bit code for a 32-bit processor " - << "requested. Ignoring 32-bit processor feature.\n"; Has64BitSupport = true; } // Silently force 64-bit register use on ppc64. @@ -94,8 +92,6 @@ // If the user requested use of 64-bit regs, but the cpu selected doesn't // support it, warn and ignore. if (use64BitRegs() && !has64BitSupport()) { - cerr << "PPC: 64-bit registers requested on CPU without support. " - << "Disabling 64-bit register use.\n"; Use64BitRegs = false; } Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=47162&r1=47161&r2=47162&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original) +++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Fri Feb 15 12:09:51 2008 @@ -235,12 +235,6 @@ // If feature string is not empty, parse features string. std::string CPU = GetCurrentX86CPU(); ParseSubtargetFeatures(FS, CPU); - - if (Is64Bit && !HasX86_64) - cerr << "Warning: Generation of 64-bit code for a 32-bit processor " - << "requested.\n"; - if (Is64Bit && X86SSELevel < SSE2) - cerr << "Warning: 64-bit processors all have at least SSE2.\n"; } else { // Otherwise, use CPUID to auto-detect feature set. AutoDetectSubtargetFeatures(); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits