http://llvm.org/bugs/show_bug.cgi?id=2985
Summary: Invalid code generated for cpu2000/gcc with -mthumb
Product: libraries
Version: trunk
Platform: All
OS/Version: All
Status: NEW
Severity: major
Priority: P2
Component: Backend: ARM
AssignedTo: [EMAIL PROTECTED]
ReportedBy: [EMAIL PROTECTED]
CC: [email protected]
llvm generates illegal assembly in Thumb:
sub r5,sp,r2
The issue is the Thumb backend is treating all integer registers in the same
register class. The register coalescer doesn't know it cannot coalesce a copy
from sp into a use.
I have attached a reduced test case. Just run llc on it to see the bad
assembly.
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