http://llvm.org/bugs/show_bug.cgi?id=4059
Summary: ARM: double arguments may be split between registers and
stack with AAPCS ABI
Product: libraries
Version: trunk
Platform: Macintosh
OS/Version: MacOS X
Status: NEW
Severity: normal
Priority: P2
Component: Backend: ARM
AssignedTo: [email protected]
ReportedBy: [email protected]
CC: [email protected]
Created an attachment (id=2871)
--> (http://llvm.org/bugs/attachment.cgi?id=2871)
testcase
This is similar to pr4058, which involves ia64 arguments. Double
floating-point arguments (f64) work correctly if the target architecture
includes the VFP floating-point registers. Otherwise, f64 arguments get split
up into i32/i32 pairs and the tests for f64 in ARMCallingConv.td fail. The
base AAPCS ABI requires f64 arguments to be passed in even/odd register pairs
or on the stack, and the ABI applies whether you have VFP support or not.
(There is an optional hard-float variant of AAPCS but LLVM does not support
that yet.) f64 arguments cannot be split between r3 and the stack when using
AAPCS. The attached testcase demonstrates the problem.
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