http://llvm.org/bugs/show_bug.cgi?id=6038

Jim Grosbach <[email protected]> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
                 CC|                            |[email protected]
         Resolution|                            |FIXED

--- Comment #3 from Jim Grosbach <[email protected]> 2010-07-19 11:01:33 CDT 
---
I believe this is fixed on ToT llvm. For v6+ ARM mode and Thumb2, the memory
barrier code is handled inline. For Thumb1 and pre-v6 processors, it's expanded
to a library call (__sync_synchronize). See r106204.

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