http://llvm.org/bugs/show_bug.cgi?id=7790
Summary: ARM disassembler disassembles rrx as rrx #0
Product: new-bugs
Version: trunk
Platform: PC
OS/Version: Linux
Status: NEW
Severity: normal
Priority: P
Component: new bugs
AssignedTo: [email protected]
ReportedBy: [email protected]
CC: [email protected]
(trunk rev 110038)
Opcode e1887067 is disassembled as
orr r7, r8, r7, rrx #0
.
However the RRX shift does not take an argument. The correct form, I believe,
would be just
orr r7, r8, r7, rrx
.
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