http://llvm.org/bugs/show_bug.cgi?id=8911
Summary: VMLA/VMLS codegen error
Product: libraries
Version: trunk
Platform: PC
OS/Version: Linux
Status: NEW
Severity: normal
Priority: P
Component: Backend: ARM
AssignedTo: [email protected]
ReportedBy: [email protected]
CC: [email protected]
When faced with the following code:
#define __ARM_NEON__
#include <arm_neon.h>
float32x2_t f32d;
void vmul() {
f32d = vmla_f32(f32d, f32d, f32d);
}
Clang produces the IR sequence:
%tmp.i = load <2 x float>* %__a.addr.i, align 8
%tmp1.i = load <2 x float>* %__b.addr.i, align 8
%tmp2.i = load <2 x float>* %__c.addr.i, align 8
%mul.i = fmul <2 x float> %tmp1.i, %tmp2.i
%add.i = fadd <2 x float> %tmp.i, %mul.i
Which used to be translated into:
vmla.f32 d0, d1, d2
A while ago, this was expanded wrongly to a pair of vmul+vadd but in the latest
trunk I'm getting the assert:
clang: /work/llvm/src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:810:
llvm::SDValue<unnamed>::SelectionDAGLegalize::LegalizeOp(llvm::SDValue):
Assertion `(isTypeLegal(Node->getOperand(i).getValueType()) ||
Node->getOperand(i).getOpcode() == ISD::TargetConstant) && "Unexpected illegal
type!"' failed.
With Last error in the stack:
4. Running pass 'ARM Instruction Selection' on function '@vmul'
I believe there are two bugs here, fixing the codegen assert will clear to
expose the real error, not matching mul+add to vmla.
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