http://llvm.org/bugs/show_bug.cgi?id=9368
Summary: ARM disassembler failed to disassemble bx
Product: libraries
Version: trunk
Platform: PC
OS/Version: Linux
Status: NEW
Severity: normal
Priority: P
Component: Backend: ARM
AssignedTo: [email protected]
ReportedBy: [email protected]
CC: [email protected]
================
$ echo '0x1c 0xff 0x2f 0xe1' | Debug+Asserts/bin/llvm-mc -arch=arm
--disassemble -debug
Args: Debug+Asserts/bin/llvm-mc -arch=arm --disassemble -debug
Opcode=0 Name=PHI Format=(42)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6
5 4 3 2 1 0
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 0| 0: 0: 0: 1| 0: 0: 1: 0| 1: 1: 1: 1| 1: 1: 1: 1| 1: 1: 1: 1| 0: 0:
0: 1| 1: 1: 0: 0|
-------------------------------------------------------------------------------------------------
Unknown format
<stdin>:1:1: warning: invalid instruction encoding
0x1c 0xff 0x2f 0xe1
^
================
It should output "bx r12".
ARMInstrInfo.td defined BX, but generated ARMGenDecoderTables.inc doesn't
return the opcode of BX.
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