http://llvm.org/bugs/show_bug.cgi?id=10736
Summary: LegalizeVectorTypes fails when attempting to Widen a
MERGE_VALUES node
Product: libraries
Version: 2.9
Platform: PC
OS/Version: Linux
Status: NEW
Severity: normal
Priority: P
Component: Common Code Generator Code
AssignedTo: [email protected]
ReportedBy: [email protected]
CC: [email protected]
Created an attachment (id=7122)
--> (http://llvm.org/bugs/attachment.cgi?id=7122)
test case that triggers assert
When running the test case through a backend that supports natively v4f32 data
type, this bitcode file causes an assert as it attempts to widen a v3f32
element of a structure. The problem is that the v3f32 is the result of a
MERGE_VALUES SDNode and in DAGTypeLegalizer::WidenVectorResult() there is no
case for this node type.
This does not cause problems on X86 because it does not support the v4f32 data
type needed to widen the node and thus scalarizes the data type.
Here is the assert:
llc --march=amdil _temp_1_cypress_optimized.bc
WidenVectorResult #0: 0x9da2750: v3f32,i32,i32,i32,i32 = merge_values
0x9da1a90, 0x9da1ed0, 0x9da2310, 0x9da24a8, 0x9da2640 [ORD=5] [ID=0]
Do not know how to widen the result of this operator!
UNREACHABLE executed at ../../../LegalizeVectorTypes.cpp:1244!
Aborted
I'm not sure how to fix this as even when I implement WidenVecRes_MERGE_VALUES,
I still hit asserts in LegalizeTypes with v3f32 issues.
Another approach i am working on is having LLVM split instead of widen vec3
nodes, but then I run into asserts based on Lo and Hi results of a split not
being the same size.
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