http://llvm.org/bugs/show_bug.cgi?id=10806
Summary: [x86 disassembler] vldmxcsr disassembled incorrectly
Product: libraries
Version: trunk
Platform: PC
OS/Version: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: X86
AssignedTo: [email protected]
ReportedBy: [email protected]
CC: [email protected]
According to the "Intel® 64 and IA-32 Architectures Software Developer’s Manual
Volume 2 (2A & 2B): Instruction Set Reference, A-Z", p. 3-571:
VEX.LZ.0F.WIG AE /2
VLDMXCSR m32
"LZ" in the above spec is defined on p. 3-5:
If VEX.LZ is present in the opcode column: The VEX.L must be encoded to be 0B,
an #UD occurs if VEX.L is not zero.
$ echo '0xc5 0xf0 0xae 0x11'| ./llvm-mc -disassemble -triple="x86_64"
-x86-asm-syntax=intel
ldmxcsr DWORD PTR [RCX]
$ echo '0xc4 0xc1 0x70 0xae 0x11'| ./llvm-mc -disassemble -triple="x86_64"
-x86-asm-syntax=intel
ldmxcsr DWORD PTR [R9]
When the 'L' bit is not set, the disassembler (using trunk r138250) is showing
"ldmxcsr" instead of the expected "vldmxcsr".
With the 'L' bit set, the mnemonic shows the leading 'v', but this should be
undefined according to the Intel spec:
$ echo '0xc5 0xf4 0xae 0x11'| ./llvm-mc -disassemble -triple="x86_64"
-x86-asm-syntax=intel
vldmxcsr DWORD PTR [RCX]
$ echo '0xc4 0xc1 0x74 0xae 0x11'| ./llvm-mc -disassemble -triple="x86_64"
-x86-asm-syntax=intel
vldmxcsr DWORD PTR [R9]
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