http://llvm.org/bugs/show_bug.cgi?id=11749
Bug #: 11749
Summary: [AVX2] Assertion hits with i64-based shufflevector in
X86ISelLowering.cpp
Product: new-bugs
Version: trunk
Platform: PC
OS/Version: All
Status: NEW
Severity: enhancement
Priority: P
Component: new bugs
AssignedTo: [email protected]
ReportedBy: [email protected]
CC: [email protected]
Classification: Unclassified
Created attachment 7864
--> http://llvm.org/bugs/attachment.cgi?id=7864
test case
When the attached test case is compiled with llc -mattr=+avx2, the following
assertion hits:
Assertion failed: ((VT.is128BitVector() || VT.is256BitVector()) && "Unsupported
vector type for horizontal add/sub"), function isHorizontalBinOp, file
X86ISelLowering.cpp, line 14255.
(This assertion doesn't hit with -mattr=+avx).
--
Configure bugmail: http://llvm.org/bugs/userprefs.cgi?tab=email
------- You are receiving this mail because: -------
You are on the CC list for the bug.
_______________________________________________
LLVMbugs mailing list
[email protected]
http://lists.cs.uiuc.edu/mailman/listinfo/llvmbugs