http://llvm.org/bugs/show_bug.cgi?id=13608
Bug #: 13608
Summary: Need an alternative register allocation order
Product: new-bugs
Version: trunk
Platform: PC
OS/Version: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: new bugs
AssignedTo: [email protected]
ReportedBy: [email protected]
CC: [email protected]
Classification: Unclassified
Currently, LLVM allocates registers in a linear order: given a VR, it tries all
the regs in the corresponding Reg Class in the same order.
In many cases, it is desirable as it can minimize register pressure.
However, on some ARM processor with limited register renaming capability, we
observe performance loss due to increased false data dependency.
So, we suggest to add an optional round-robin style register allocation
ordering, which can be enabled on-demand.
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