http://llvm.org/bugs/show_bug.cgi?id=14590
Bug #: 14590
Summary: X86: Need to implement efficient vector sign-extend
load.
Product: libraries
Version: trunk
Platform: PC
OS/Version: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: X86
AssignedTo: [email protected]
ReportedBy: [email protected]
CC: [email protected]
Classification: Unclassified
At the moment x86 scalarizes sign-extend loads. We need to convert this
sequence to Load, Unpack, SRL, SRA.
%X = load <4 x i16>* %ptr
%Y = sext <4 x i16> %X to <4 x i32>
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