http://llvm.org/bugs/show_bug.cgi?id=17539
Bug ID: 17539
Summary: mips disassembly does not sign-extend immediate
operand (daddiu, others?)
Product: new-bugs
Version: trunk
Hardware: PC
OS: FreeBSD
Status: NEW
Severity: normal
Priority: P
Component: new bugs
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
I'm adding MIPS support to LLDB and see that daddiu's 16-bit immediate operand
is not interpreted properly:
(lldb) disass
libc.so.7`__raise:
0x16019e8e0: daddiu $sp, $sp, 65504
0x16019e8e4: sd $ra, 16($sp)
...
it is a 16-bit signed value; 65504 should be -32
Mips64InstrInfo.td
def DADDiu : ArithLogicI<"daddiu", simm16_64, GPR64Opnd, IIArith,
immSExt16, add>,
ADDI_FM<0x19>, IsAsCheapAsAMove;
MipsGenDisassemblerTables.inc
case 159:
tmp = fieldFromInstruction(insn, 16, 5);
if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) ==
MCDisassembler::Fail) return MCDisassembler::Fail;
tmp = fieldFromInstruction(insn, 21, 5);
if (DecodeGPR64RegisterClass(MI, tmp, Address, Decoder) ==
MCDisassembler::Fail) return MCDisassembler::Fail;
tmp = fieldFromInstruction(insn, 0, 16);
MI.addOperand(MCOperand::CreateImm(tmp));
return S;
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