http://llvm.org/bugs/show_bug.cgi?id=17769
Bug ID: 17769
Summary: Add support for ldr pseudo instruction in ARM
integrated assembler
Product: tools
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: llc
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
Both armasm and gnu as support an ldr pseudo instruction for loading constants
that lowers to either a mov, movn, or a pc-relative ldr from the constant pool.
For example, compiling this assembly with gnu as:
.text
foo:
ldr r0, =0x1
ldr r0, =-0x1
ldr r0, =0x1000001
ldr r0, =bar
ldr r0, =baz
bar:
Produces an object file like this (with relocations shown):
Disassembly of section .text:
00000000 <foo>:
0: e3a00001 mov r0, #1
4: e3e00000 mvn r0, #0
8: e59f0004 ldr r0, [pc, #4] ; 14 <bar>
c: e59f0004 ldr r0, [pc, #4] ; 18 <bar+0x4>
10: e59f0004 ldr r0, [pc, #4] ; 1c <bar+0x8>
00000014 <bar>:
14: 01000001 .word 0x01000001
18: 00000014 .word 0x00000014
18: R_ARM_ABS32 .text
1c: 00000000 .word 0x00000000
1c: R_ARM_ABS32 baz
Currently the llvm integrated assembler fails on this input with an error like:
error: unexpected token in operand
ldr r0, =0x1
^
After discussion on the llvm-dev list (see thread started here:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-October/066808.html), the
community supports adding this feature to the integrated assembler.
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