http://llvm.org/bugs/show_bug.cgi?id=18996
Bug ID: 18996
Summary: Changing regalloc order breaks "lencod" on native arm
linux builds.
Product: new-bugs
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: new bugs
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
The LNT run of lencod broke here:
http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/5356
After this commit:
Author: atrick
Date: Wed Feb 26 16:07:26 2014
New Revision: 202304
URL: http://llvm.org/viewvc/llvm-project?rev=202304&view=rev
Log:
Add a limit to the heuristic that register allocates instructions in local
order.
This handles pathological cases in which we see 2x increase in spill
code for large blocks (~50k instructions). I don't have a unit test
for this behavior.
Fixes rdar://16072279.
Modified:
llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
There is a downstream codegen bug that is only exposed by a certain register
allocation order, and only currently reproducible on native arm linux builds.
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