http://llvm.org/bugs/show_bug.cgi?id=19164
Bug ID: 19164
Summary: __sync_fetch_and_or with power-of-two argument should
generate "lock bts" code
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: X86
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
For
unsigned f(unsigned *addr) {
return __sync_fetch_and_or(addr, 1 << 7) & (1 << 7);
}
We currently generate:
f:
movl (%rdi), %eax
.LBB0_1:
movl $128, %ecx
orl %eax, %ecx
lock
cmpxchgl %ecx, (%rdi)
jne .LBB0_1
andl $128, %eax
retq
It would be cool if we could recognize that the read-modify-write we're doing
here is actually bit-test-and-set, which can be done with the bts instruction.
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