http://llvm.org/bugs/show_bug.cgi?id=21398
Bug ID: 21398
Summary: Homegeneous aggregates with C++ base classes passed
incorrectly on PPC64, ARM, and Aarch64
Product: clang
Version: unspecified
Hardware: PC
OS: Windows NT
Status: NEW
Severity: normal
Priority: P
Component: LLVM Codegen
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected], [email protected],
[email protected], [email protected]
Classification: Unclassified
Consider:
struct Base {
int x;
};
struct HVA : Base {
double y, z;
};
void f(HVA x);
extern HVA h;
void g() {
f(h);
}
On ARM, Clang will pass this in r0, d0, and d1, but gcc will pass in r0-r5.
AArch64 uses the same code and PPC64 looks like it is duplicated from the same
routine, so I'm sure they have similar issues.
Back on 3.4 when we used to do record flattening, we would completely screw
this up and would only pass the two doubles. Currently we just misclassify, but
we pass all the data.
IMO we should refactor the homogeneous aggregate calculation code to accept an
architecture. There's more complexity in walking Clang types than there is in
the target-specific logic.
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