http://llvm.org/bugs/show_bug.cgi?id=21452
Bug ID: 21452
Summary: PowerPC inline assembly "=&r" constraint failing
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: Backend: PowerPC
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
Created attachment 13272
--> http://llvm.org/bugs/attachment.cgi?id=13272&action=edit
Inline assembly testcase
The attached testcase built with -O2 -mcpu=power7 is buggy.
asm volatile(" lwsync\n"
"1: lwarx %0,0,%1 # atomic_dec_return\n"
" addic %0,%0,-1\n"
" stwcx. %0,0,%1\n"
" bne- 1b\n"
" sync\n"
:"=&r"(t)
:"r"(&v->counter)
:"cr0", "xer", "memory");
"=&r" should be enough to prevent t and v->counter ending up in the same
register, but it does:
1: lwarx 30,0,30 # atomic_dec_return
addic 30,30,-1
stwcx. 30,0,30
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