http://llvm.org/bugs/show_bug.cgi?id=21477
Bug ID: 21477
Summary: exact shift right of constant not optimized
(instcombine / value tracking)
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Scalar Optimizations
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
[Follow-on from bug 21412.]
An exact shift right guarantees that no set bits are shifted out, so this:
define i32 @exact_shift(i32 %shiftval) {
%shr = lshr exact i32 1, %shiftval
ret i32 %shr
}
...should be optimized to:
define i32 @exact_shift(i32 %shiftval) {
ret i32 1
}
Ie, %shiftval must be zero, or we have undefined behavior / poison.
In the other bug, the shift is followed by division, so the ideal optimization
for:
define i32 @exact_div(i32 %x, i32 %shiftval) {
%shr = lshr exact i32 1, %shiftval
%div = udiv i32 %x, %shr
ret i32 %div
}
...will be:
define i32 @exact_div(i32 %x, i32 %shiftval) {
ret i32 %x
}
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