http://llvm.org/bugs/show_bug.cgi?id=21801
Bug ID: 21801
Summary: ARM64: Assertion failed: ((BiggerPattern || (Srl_imm >
0 && Srl_imm < VT.getSizeInBits())) && "bad amount in
shift node!")
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: AArch64
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
Created attachment 13448
--> http://llvm.org/bugs/attachment.cgi?id=13448&action=edit
llvm-stress --seed=29856
Attached bitcode asserts in the backend.
llc -mtriple=arm64-apple-ios8.0 -filetype=obj -o /dev/null test-29856.ll
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