https://llvm.org/bugs/show_bug.cgi?id=23155
Bug ID: 23155
Summary: llvm 16 bit integer code causes lots of partial
register stalls
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: normal
Priority: P
Component: Backend: X86
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
When generating code for one of the eembc/telecom kernels llvm generates
a lot of 16 bit operations, specifically loads that cause partial register
usage. Due to the false dependency on the upper portion of
the register, these operations are much slower than if they were expanded to be
32 bit operations.
This specifically impacts the code generated for EEMBC/telecom/viterb00.c
routine ACS. Eliminating the partial register stalls increases performance
by about 27% for the data_2 input set. For other input sets the performance
improvement is less, but it is significant for all of those inputs.
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