https://llvm.org/bugs/show_bug.cgi?id=23339
Bug ID: 23339
Summary: Continuous memory fences fail lower into one
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: AArch64
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
We have file test.ll which contains:
define i32 @t1() {
entry:
fence seq_cst
fence seq_cst
fence seq_cst
fence seq_cst
ret i32 0
}
When dealing with arm taret, the output looks like sane:
$llc -O0 -mtriple arm-linux-gnueabi -mcpu cortex-a53 test.ll -o -
.type t1,%function
t1: @ @t1
.fnstart
@ BB#0: @ %entry
movw r0, #0
dmb ish
bx lr
.Lfunc_end0:
.size t1, .Lfunc_end0-t1
.fnend
But with arm64 target:
$llc -O0 -mtriple arm64-linux-gnueabi -mcpu cortex-a53 test.ll -o -
t1: // @t1
.cfi_startproc
// BB#0: // %entry
mov w8, wzr
dmb ish
dmb ish
dmb ish
dmb ish
mov w0, w8
ret
.Lfunc_end0:
.size t1, .Lfunc_end0-t1
.cfi_endproc
We have multiple "dmb ish" instructions here.
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