https://llvm.org/bugs/show_bug.cgi?id=23455
Bug ID: 23455
Summary: Intel parser doesn't recognize cmp${cc}ss
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: X86
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
Consider:
$ echo 'cmpnless xmm0, xmm1' | ./bin/llvm-mc -x86-asm-syntax=intel
.section __TEXT,__text,regular,pure_instructions
<stdin>:1:1: error: invalid operand for instruction
cmpnless xmm0, xmm1
$ echo 'cmpnless %xmm1, %xmm0' | ./bin/llvm-mc
.section __TEXT,__text,regular,pure_instructions
cmpnless %xmm1, %xmm0
This is an old problem, that is now triggered because we started actually
parsing the cmpCCss forms, rather than just string-replacing the CC to an
immediate (as of r229266).
Here's the relevant part of the matchers:
{ 1170 /* cmp */, X86::CMPSSrr, Convert__Reg1_2__Tie0__Reg1_3__Imm1_0, 0, {
MCK_Imm, MCK_SS, MCK_FR32, MCK_FR32 }, },
And here's the same matcher for AT&T syntax:
{ 1170 /* cmp */, X86::CMPSSrr, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, {
MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 }, },
Notice _ss vs _SS: with Intel syntax, when TableGen generates the matcher from
the AsmString, it splits "cmp${cc}ss" into tokens, and the "ss" suffix is
recognized as a register ...the SS segment register.
It should probably know that when the token ("ss") doesn't follow a space, it's
not a register (I can't think of a case where that would make sense).
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