https://llvm.org/bugs/show_bug.cgi?id=23912
Bug ID: 23912
Summary: Handling of ARM Errata 602117 (and testcase) is broken
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: ARM
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected]
Classification: Unclassified
While working on the ARMLoadStoreOptimizer code I realized that the handling of
Cortex-M3 Errata 602117 and the llvm-lit test that checks for it are faulty. If
you use the following test instead, you still see an invalid ldrd created, even
with -mcpu=cortex-m3.
; we call the following two to force values into specific registers.
declare i64* @get_ptr()
declare void @use_i64(i64 %v)
define void @test_ldrd(i64 %a) nounwind readonly {
%ptr = call i64* @get_ptr()
%v = load i64, i64* %ptr, align 8
call void @use_i64(i64 %v)
ret void
}
Results in:
...
bl _get_ptr
ldrd r0, r1, [r0]
bl _use_i64
...
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