Oh crap. It worked on ARMv7 but that one has true support for 64-bit atomics so no need to add a spin lock flag. PPC64 has load-w-reservation/store-conditional *paired* support (like ARM), why doesn't PPC32?
On 12 January 2015 at 11:55, Alexandru Badicioiu <[email protected]> wrote: > Hi Ola, > I'm trying to get the linux-generic timer implementation running on my > 32-bit platform and I have the following issue: > _ODP_STATIC_ASSERT(sizeof(tick_buf_t) == 16, "sizeof(tick_buf_t) == 16"); > fails because sizeof(tick_buf_t) is actually larger because of the size of > odp_atomic_u64_t (already 16 bytes due to lock and alignment): > > /** > * Atomic 64-bit unsigned integer > */ > typedef struct { > uint64_t v; /**< Actual storage for the atomic variable */ > #if __GCC_ATOMIC_LLONG_LOCK_FREE < 2 > /* Some architectures do not support lock-free operations on 64-bit > * data types. We use a spin lock to ensure atomicity. */ > char lock; /**< Spin lock (if needed) used to ensure atomic access > */ > #endif > } odp_atomic_u64_t > ODP_ALIGNED(sizeof(uint64_t)); /* Enforce alignement! */ > > Should size of 16 bytes be enforced for lockless implementation only or it > is required also for lock-based implementation ()? The 16-byte size is only required for lock-less implementations so you could add an #ifdef of some kind around that check and skip it for PPC32. Likewise for the alignment requirement. (hmm spelling error in the comment). > > Thanks, > Alex > _______________________________________________ lng-odp mailing list [email protected] http://lists.linaro.org/mailman/listinfo/lng-odp
