This was already on my calendar for Monday. Is there a phone number?
Rob
At 8:30 AM -0700 10/20/06, Jeffrey P Kantor wrote:
Hello all,
This sounds good. Also, be aware that Rob Pennington from NCSA is leading a
breakout at the all hands on advanced computing architectures. The full
agenda for the meeting will be posted next week. I have copied him to see
if I can draw him into the Tech Assess Working Group telecons ;-)
Jeff
From: Don Dossa <[EMAIL PROTECTED]>
Reply-To: LSST Data Management <[email protected]>
Date: Thu, 19 Oct 2006 14:07:00 -0700
To: LSST Data Management <[email protected]>
Subject: [LSST-data] Tech Assess monday concall
Let's plan on a call on Monday, Oct 23 at 10AM pacific time.
Item's I would like to discuss are the latest updates on
DC1.
Let's think about some possible future computing technologies
so we have something for updates to the NSF proposal.
Obvious candidates to look at are
cell BE
8-way multicores, cache coherency and memory bandwidth requirements
future very high speed memory chips
bluegene p and q
FPGA
graphics chips
accelerator boards ala Clearspeed
I have just started reading the tech papers on cell but havent
used ours here yet. I know some of you have run some stuff on
your cell systems.
I'm not sure what any of us are permitted to say about
bgl/p and bgl/q, but let's not forget about it.
Can someone(s) sign up for graphics chips and accelerator boards? And
possibly FPGAs?
If we decide 8 and 16 way core chips mem requirements grossly
exceed we can look at industry expectations for memory
Let's talk about what we can sign up to do in the near future.
Once we have exhausted ourselves on these topics, we can move
onto storage, interconnect, and networking.
--Don
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