On 10/31/2013 04:40 PM, [email protected] wrote:
> Hi!
> On 10/31/2013 05:38 AM, Wanlong Gao wrote:
>> On 10/30/2013 07:21 PM, Alexey Kodanev wrote:
>>> There is another way to check that PCI Express config space of pci devices
>>> can be read successfully.
>>> Firstly, find out if a device has a PCI Express Capability: we should get
>>> a correct config address offset from the dev's structure (dev->pcie_cap).
>>> Using the offset, read a PCI Express header. Check if we can get the right
>>> PCI Express CAP ID from the header (it must match the PCI_CAP_ID_EXP macro).
>> This can PASS here, thank you.
>>
>> Why did the original method always FAIL?
> 
> The original code has wrong offset, should be reg = 0x100 at least (as it 
> written in comment):
>> int reg = 100, len = 4; /*PCI-Exp enhanced config register 0x100, 4 implies 
>> dword access */
> 
> I don't know about that magic number 0x14011 in the original code. Comments 
> said that we can find a constant value from that offset, but in truth, we can 
> find any of the PCI_EXT_CAP_ID_* macors in the first 16 bits or none if 
> device doesn't have Extended Configuration Space. It can be AER (ERR in the 
> macro) and it could be any other ID (it depends on the device).
> 
> better find a particular offset using the kernel function, for example:
> pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); /* it will find 
> Advanced Error Reporting structure */
> 
> Then get the header (first 4 bytes). First 16 bits should be AER_ID, that it 
> is to say 0x0001. From bit 16 to bit 19 - capability version (can be 1h or 
> 2h). The other bits contain the offset to the next PCI Express Capability 
> structure or zero if it is the last one. That kind of header will never equal 
> to 0x14011, that's is why the original method will always fail even with the 
> right offset.
> 

OK, got it, thank you for your explaination.

Wanlong Gao

> 


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