Ben Green wrote:
I guess an important parameter in this regard would be the front bus speed.On Mon, 21 Aug 2006 08:47:05 +0100, Gudmund Areskoug <[EMAIL PROTECTED]> wrote: The Pentium/Xeon SMP architecture AFAIK share the same bus whereas the Opterons each have their own dedicated 1GHz FSB to their own dedicated memory, while each opteron can still access the other processors' memory, albeit at a cost of speed. Hence the name non uniform memory access, or NUMA. So for instance you'd have a total of roughly 4 GHz FSB for a quad opteron system whereas you're bound with 1066/1333 MHz FSB in a latest Xeon SMP box. So if the P4 750 and the Xeon system that you mention had the same FSB speed: You'd have been better off with the quad PIII if a large number of small threads that fit in the cache of each processor. I'd guess their performance would be about the same for a large number of threads requiring frequent memory access, and you'd be better off with the Xeon running larger applications. So it's a combination of processor speed, cache size, FSB and the number and memory access needs of the threads that together determine the overall performance. There is unfortunately no straightforward formula--pretty complicated stuff actually. |
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