Signed-off-by: Paul E. McKenney <[email protected]>
---
urcu/arch_generic.h | 4 ----
urcu/arch_ppc.h | 5 -----
urcu/arch_x86.h | 14 --------------
3 files changed, 0 insertions(+), 23 deletions(-)
diff --git a/urcu/arch_generic.h b/urcu/arch_generic.h
index e9b1b82..0484618 100644
--- a/urcu/arch_generic.h
+++ b/urcu/arch_generic.h
@@ -121,10 +121,6 @@ extern "C" {
#define cpu_relax() barrier()
#endif
-#ifndef sync_core
-#define sync_core() mb()
-#endif
-
#ifdef __cplusplus
}
#endif
diff --git a/urcu/arch_ppc.h b/urcu/arch_ppc.h
index eeeb753..185cb22 100644
--- a/urcu/arch_ppc.h
+++ b/urcu/arch_ppc.h
@@ -34,11 +34,6 @@ extern "C" {
#define mb() asm volatile("sync":::"memory")
-/*
- * Serialize core instruction execution. Also acts as a compiler barrier.
- */
-#define sync_core() asm volatile("isync" : : : "memory")
-
#define mftbl() \
({ \
unsigned long rval; \
diff --git a/urcu/arch_x86.h b/urcu/arch_x86.h
index 64cc026..e3171a2 100644
--- a/urcu/arch_x86.h
+++ b/urcu/arch_x86.h
@@ -47,20 +47,6 @@ extern "C" {
#define cpu_relax() asm volatile("rep; nop" : : : "memory");
-/*
- * Serialize core instruction execution. Also acts as a compiler barrier.
- * On PIC ebx cannot be clobbered
- */
-#ifdef __PIC__
-#define sync_core() \
- asm volatile("push %%ebx; cpuid; pop %%ebx" \
- : : : "memory", "eax", "ecx", "edx");
-#endif
-#ifndef __PIC__
-#define sync_core() \
- asm volatile("cpuid" : : : "memory", "eax", "ebx", "ecx", "edx");
-#endif
-
#define rdtscll(val) \
do { \
unsigned int __a, __d; \
--
1.7.0.6
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