The dmb instruction is used to implement a memory barrier on modern ARM hardware. The older generations of processors which are included in single processor systems can get by on the generic implementation of the cmm_mb(). This will allow the user space rcu to work on many other ARM systems.
Signed-off-by: Jason Wessel <[email protected]> --- configure.ac | 20 ++++++++++++++++++++ urcu/arch_arm.h | 2 ++ 2 files changed, 22 insertions(+), 0 deletions(-) diff --git a/configure.ac b/configure.ac index 69ce396..3e1b501 100644 --- a/configure.ac +++ b/configure.ac @@ -20,6 +20,7 @@ AH_TEMPLATE([CONFIG_RCU_HAVE_FENCE], [Defined when on a system that has memory f AH_TEMPLATE([CONFIG_RCU_HAVE_FUTEX], [Defined when on a system with futex support.]) AH_TEMPLATE([CONFIG_RCU_COMPAT_ARCH], [Compatibility mode for i386 which lacks cmpxchg instruction.]) +AH_TEMPLATE([CONFIG_ARM_HAVE_DMB], [Use the dmb instruction is available for use on ARM.]) # Checks for programs. AC_PROG_CC @@ -56,6 +57,25 @@ case $host_cpu in *) ARCHTYPE="unknown";; esac +if test "x$ARCHTYPE" = "xarm" ; then +AC_MSG_CHECKING([checking for dmb instruction]) +AC_TRY_COMPILE( +[ +], +[ +asm volatile("dmb":::"memory"); +], +[ + AC_MSG_RESULT([yes]) + AC_DEFINE([CONFIG_ARM_HAVE_DMB], [1]) +] +, +[ + AC_MSG_RESULT([no]) +] +) +fi + UATOMICSRC=urcu/uatomic_arch_$ARCHTYPE.h ARCHSRC=urcu/arch_$ARCHTYPE.h if test "x$ARCHTYPE" != xx86 -a "x$ARCHTYPE" != xppc; then diff --git a/urcu/arch_arm.h b/urcu/arch_arm.h index e25457d..83cbb60 100644 --- a/urcu/arch_arm.h +++ b/urcu/arch_arm.h @@ -29,7 +29,9 @@ extern "C" { #endif +#ifdef CONFIG_ARM_HAVE_DMB #define cmm_mb() asm volatile("dmb":::"memory") +#endif /* CONFIG_ARM_HAVE_DMB */ #include <stdlib.h> #include <sys/time.h> -- 1.7.0 _______________________________________________ ltt-dev mailing list [email protected] http://lists.casi.polymtl.ca/cgi-bin/mailman/listinfo/ltt-dev
