Hi Caglar and everyone else :)
I am using FreeRTOS v4.1.3 + lwip 1.2.0 + Rowley CrossWorks.
Upon further investigation, it actually seems to be a stack overflow, which is
the root for my problem.
I have increased the value for lwipTCP_STACK_SIZE from 600 to 800,
and now the application has run straight for over an hour.
I read up on the undef exception handling in the ARM archtecture reference
manual.
Which says that the instruction pointed to by LR is the instruction after the
instruction that caused
the exception.
I thought as per the Atmel datasheet that the failing address would be present
in the MC_AASR,
but the value in LR - offset, doesn't match the value in MC_AASR.
The LR register point to an instruction, where we enter the tcp_input function.
Where the values for pbuf pointer and netif pointer is initialized.
While writing this mail, another undef exception occured :(
here is the callstack:
tcp_next_iss()
tcp_input()
undef_handler()
if i look closer at where the execution of each the above functions ended i get
this result:
tcp_next_iss(void){ B580 push {r7, lr} AF02 add r7, sp,
#0x008 static u32_t iss = 6510; iss += tcp_ticks; /* XXX */ 4B07
ldr r3, [pc, #0x01c] 681A ldr r2, [r3, #0x00] 4B07 ldr
r3, [pc, #0x01c] 681B ldr r3, [r3, #0x00] 18D2 adds r2, r2,
r3 4B05 ldr r3, [pc, #0x014] 601A str r2, [r3, #0x00] return
iss; 4B04 ldr r3, [pc, #0x010] 681B ldr r3, [r3, #0x00]}
1C18 adds r0, r3, #0x0 46BD mov sp, r7
got to this line: B082 sub sp, #0x008
the below wasn't executed BC80 pop {r7} BC02 pop {r1}
4708 bx r1 0000 lsls r0, r0, #0x00 0074 lsls r4, r6,
#0x01 0020 lsls r0, r4, #0x00 EB880020 ????.w r0, r8, r0, asr
#0x20 4710 bx r2
tcp_input(struct pbuf *p, struct netif *inp){ B5F0 push {r4-r7, lr}
B08A sub sp, #0x028 AF02 add r7, sp, #0x008
got to this line: 1C3B adds r3, r7, #0x0
jump to undef_handler occured here.
the below wasn't executed 330C adds r3, #0x0c 6018 str r0,
[r3, #0x00] 1C3B adds r3, r7, #0x0 3308 adds r3, #0x08
6019 str r1, [r3, #0x00]hope someone can help my out here, since i might
be on the wrong track.
And if anyone has some insights into what the MC_AASR really represents, let me
know.
ty all for your help so far.
regards,
Martin
> Date: Wed, 14 Feb 2007 15:47:32 +0200> From: [EMAIL PROTECTED]> To:
> [email protected]> Subject: Re: [lwip-users] lwip + sam7x = udef
> exception> > B B wrote:> >> > Hi again,> > > > correction to the below, the
> address calculated> > is resulting in a 2 byte aligned value and not 4 byte
> as required.> > > > (struct tcp_hdr *)((u8_t *)p->payload + IPH_HL(iphdr) *
> 4) = 0x0020b1fa> > How about compiling all your source code into ARM mode and
> trying to > re-generate the problem? Maybe it can> give a clue. Moreover
> "adds r4,r4,#00" doesn't look like it can generate > a data abort. Maybe
> pipelening can be affecting> PC value. A whole code segment dissassembly can
> give more detailed info > about the error.> > By the way, you didn't mention
> about your environment. OS,compiler?> > I use SAM7X+LWIP+FREERTOS combination
> with GCC compiler and I'm quite > happy with it.> > >
> _______________________________________________> lwip-users mailing list>
> [email protected]> http://lists.nongnu.org/mailman/listinfo/lwip-users
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