Yes, this is an embedded design on a virtex5 fpga using 1G Ethernet. It has an on board Cyprus tri-mode Ethernet mac controller, the clock speed is 125MHz, 256MB ddr-sdram. I am using standard c memcpy. The board is directly connected to a pc to which it transmits using a static ip.
Also, I am using the Microblaze core (no PowerPC available). On Wed, Sep 23, 2009 at 4:19 PM, Chris Strahm <[email protected]> wrote: > I assume this is an embedded design, and you are using 1G Enet? > What is your MCU, clock speed, and amount of RAM? > How are you doing the copy, with standard memcpy? > What is on the other side: PC, router, switch ? > > Need a lot more details. > > Chris. > > >> What are some good techniques for improving UDP performance in raw mode. >> Right now i'm getting approximately 82Mbits/sec. I would like to increase >> that to 150+ Mbits/sec which should be possible according to the >> documentation. I've tried increasing various buffer/memory sizes with very >> small effects. I also setup checksum offloading which surprisingly had no >> effect on performance. >> >> Does anyone know any other techniques worth trying? Why is the documented >> speed so much higher than what I'm getting? >> >> Thanks > > > > _______________________________________________ > lwip-users mailing list > [email protected] > http://lists.nongnu.org/mailman/listinfo/lwip-users > _______________________________________________ lwip-users mailing list [email protected] http://lists.nongnu.org/mailman/listinfo/lwip-users
