Hi all, I have it working now. It seems my test program on the PC was not doing the right thing. Found another UDP test program, and that works fine. Now if only I can find a lwIP user manual that shows how to use it, rather than describing the internals .... I will be chuffed!
Thanks, Bernie On Mon, Feb 21, 2011 at 10:13 AM, Bernard Mentink <[email protected]>wrote: > Hi there, > > I have it mostly working now, except for one remaining issue. > > From the 1st run of the lwIP stack when the stack receives an ARP request, > it handles it normally and I can send/receive data between lwIP and the PC. > However, if I let the PC's ARP cache timeout and the PC requests an ARP a > 2nd time, the stack does not respond. I have to reset the lwIP uP to get > things working again. > > Anyone know what might be the issue here ... it seems to be ARP specific > now .... > > Cheers, > Bernie > > > On Sat, Feb 19, 2011 at 9:47 AM, [email protected] <[email protected]>wrote: > >> Bernard Mentink wrote: >> >>> Yes, I am using DMA. Can you please elaborate on how to invalidate the >>> cache lines, I havn't had much to do with dma to date .. >>> >> Basically, you just have to make sure that data written by the processor >> (lwIP or your driver in this case) is actually written out to RAM before the >> ethernet DMA engine reads it from there. To do that, you normally would >> execute a processor instruction to "invalidate" a certain address in the >> cache. If the cache currently holds that address, the contents are written >> to RAM and re-read on next usage. >> >> You'd normally do this when releasing RAM from the processor to the >> ethernet MAC or before touching newly received data that just has been put >> into RAM by the ethernet MAC. The actual procedure how to do that heavily >> depends on the processor and compiler toolchain you are using. For example >> when using gcc on NIOS-II, you would write >> >> asmvolatile ("flushda (%0)" :: "r" (i)); >> >> where i is the address to flush. Also, make sure that if the data size is >> bigger than one cache line, be sure to flush all corresponding cache line >> addresses (basically executing a loop like "for(i=start_addr; i < end; i += >> cacheLineSize)". >> >> There should be more information in your processor's documentation (or in >> the compiler's documentation) about this. >> >> Simon >> >> >> _______________________________________________ >> lwip-users mailing list >> [email protected] >> http://lists.nongnu.org/mailman/listinfo/lwip-users >> > > > > -- > You always have believers and scepticts.. A True inventor is always a > believer.. > -- You always have believers and scepticts.. A True inventor is always a believer..
_______________________________________________ lwip-users mailing list [email protected] http://lists.nongnu.org/mailman/listinfo/lwip-users
