I'm not sure about the LCP democode, but the ST demo code for LWIP had a
poor implementation where the incoming messages were not being read out
correctlyfrom the ethernet hardware FIFO. It assumed one interrupt per
message, but if you delay servicing the ISR for a brief time, you may
have 2 (or more) messages and only 1 interrupt.
Make sure your input loopdrains all ethernet packets, and not just one.
And/or make sureyour ISR drains the hardware FIFO on each interrupt--
don't just grab one packet.
The code kinda/sorta works like you said (with long delays) because new
incoming traffic eventually pushes the backed-up messages through the
FIFO. But it gets worse and worse with time as the FIFO gets backed up.
-Mark
On 11/13/2012 10:04 AM, Louis Wells wrote:
Hello,
I just finished porting lwip to my hardware(lcp2468), and after
running some initial tests just pinging the board I have ran into an
issue.
The first batch of pings I send are usually replied to in a reasonable
time(<5 ms), however as I continue to ping the board the response time
gets worse and worse. I watched the activity on wireshark, and
determined that the board is still responding, it is just taking up to
12 seconds to do so.
I ran a trace on the board, and it appears that there is not an issue
where it is receiving packets too quickly to process them, as I can
see it hitting the ISR when the packet is received, moving the packet
into the mailbox, and running tcpip_input followed by ip_input before
another packet is received.
I am not sure where to even begin looking for a way to solve this. A
little information about my implementation is that I am using this
with freertos, I have 1 thread set up for the main tcpip thread, and
one thread that handles inputs whenever the emac ISR wakes it.
If there is anything that I can provide that might give someone some
insight please let me know, and thanks in advance for any help.
Louis
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