I did this little addition to my FreeRTOSConfig header file: // ISR using FromISR API must use this value or greater // for the NVIC_SetPriority function. This result in a // a higher RAW value for interrupts. On Cortex M3 a higher value // is a lower priority. This make it possible for FreeRTOS // to mask the interrupt. The mask interrupt level is defined by // configMAX_SYSCALL_INTERRUPT_PRIORITY below // In other words, the priority *MUST* be at or below // configVALUE_MAX_SYSCALL_INTERRUPT_PRIORITY if FreeRTOS API functions // are called in the interrupt handler. #define configVALUE_MAX_SYSCALL_INTERRUPT_PRIORITY 5
/* The lowest priority. */ #define configKERNEL_INTERRUPT_PRIORITY ( 31 << (8 - configPRIO_BITS) ) /* Priority 5, or 160 as only the top three bits are implemented. */ #define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configVALUE_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) Then I just has to make sure that use values equal or greater then the configVALUE_MAX_SYSCALL_INTERRUPT_PRIORITY. Thomas -- View this message in context: http://lwip.100.n7.nabble.com/lwIP-crash-tp20652p20683.html Sent from the lwip-users mailing list archive at Nabble.com. _______________________________________________ lwip-users mailing list [email protected] https://lists.nongnu.org/mailman/listinfo/lwip-users
