What processor are you using?

I had a problem with slow delay loading and found that the Atmel's example
driver for the GMAC was using DMA to transfer data and then polling the
SRAM DMA location to see when transfer was done. The issue was that if I
turned the data cache on in the processor it would cache the SRAM data and
then cause weird slow or non responsive behavior.   For the moment I have
data cache off but will have to rewrite the drivers to use interrupts
eventually.

Trampas

On Thu, Oct 24, 2019 at 3:08 PM vinu <vinu.gopalakrish...@gadgeon.com>
wrote:

> Hi all,
>
> I am having issue in loading web page using netconn APIs in LWIP v1.4.2 on
> FreeRTOS.
>
> Earlier the issue was not there when we where running the MCU at 12MHz
> clock. But once we switched to 120MHz, we are noticing random page loading
> issues.
>
> After few days of debugging  the stack, we found that the messages are
> actually received at the TCP layer, but not received by the application
> layer.
>
> We have found that the request reaches the point *TCP_EVENT_RECV(pcb,
> recv_data, ERR_OK, err);* in file tcp_in.c (added debug prints and
> confirmed) - PFA image_1.
>  Sometimes the packet reaches netconn_recv mailbox after a delay and
> sometimes the packets never reach. I'm attaching the wireshark capture of
> this issue. See packet no 92. login_page_issue.pcapng
> <http://lwip.100.n7.nabble.com/file/t2163/login_page_issue.pcapng>
>
> <http://lwip.100.n7.nabble.com/file/t2163/Screenshot_%2828%29.png>
>
> Please help.
>
> regards,
> Vinu
>
>
>
>
>
>
> --
> Sent from: http://lwip.100.n7.nabble.com/lwip-users-f3.html
>
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