As long as the basic program works to manually switch to a known bank without knowing which bank you are currently in, that can serve as the recovery instead of power-cycle. Say you switch to a bank without 0quad installed, but forgot which bank you switched to, and so now you can't install 0quad in the current bank.
I assume there is also a much shorter basic command possible with hard coded values that just switches to bank 1 without having to know which bank you're in now. -- bkw On Nov 5, 2017 5:15 PM, "Stephen Adolph" <[email protected]> wrote: no, you are correct. in the V5 schematic I needed an or gate, so one of the BAV70s is doing. The /ACTIVE signal provides a "virtual ground" for the or gate. when /ACTIVE shoots high, it guarantees no strange accidental clock pulses are sent to the flip flops. I think what I have concluded is that, like the T200 and PC-8201, having the machine come up in the same bank it was powered off in, is a nice feature. So, I wired the flip flops to the RAM power supply (made from RAMRST). feel free to ask questions and make suggestions! thanks Steve On Sun, Nov 5, 2017 at 5:08 PM, Atsushi Takahashi <[email protected]> wrote: > Dear Steve, > > I didn’t realize how you were using what I thought was a reset circuit… I > though you wanted to bring QUAD up in a preset bank… > > Those kinds of chips work great to hold the CPU in a reset state until the > rest of the system is ready. I guess if the QUAD/RAM were not needed for > the delay time, it would be fine.. The ALE solution is pretty elegant. > > I actually thought the BAV diode was being used as an OR gate… oops! I’m > just full of bad guesses! > > -atsushi > > > On Nov 5, 2017, at 12:21 PM, Stephen Adolph <[email protected]> wrote: > > Hey that is a pretty neat part. Thanks! > > > Characteristic is something to check out though- > > "Active-low output. RESET remains low while VCC is below the reset > threshold,and *for 240 ms* after VCC rises above the reset threshold." > > In this case we want RAM to be available pretty quickly after power up, > and pretty quickly protected when it goes away. I have my circuit driven > by ALE pulses. It takes 13 pulses or so (about 4 CPU instructions) on > power up to enable the RAM, and about 3 msec to disable the RAM on power > down. > > I'd have to check if on power up RAM is needed withing 240 msec of a > detected power on. > > the beauty of using ALE is that ALE remains low during power off, and it > really directly indicates activity. > > cheers > Steve > > > > On Sun, Nov 5, 2017 at 12:08 PM, Stephen Adolph <[email protected]> > wrote: > >> thanks for the tip! I will check it out. >> >> In the M100, RAMRST is meant to protect the ram. However, in QUAD one >> has to back drive RAMRST to essentially put the internal memory on hold. >> >> On Sun, Nov 5, 2017 at 12:06 PM, Atsushi Takahashi <[email protected]> >> wrote: >> >>> Dear Steve, >>> >>> I ordered the old QUAD boards from OSH Park but I also purchased one of >>> these >>> >>> LM810M3-4.63/NOPBCT-ND >>> >>> from Digi-Key in an attempt to address the power on reset issue. It’s >>> just a three pin surface mount chip. I used to have something like that in >>> my 68hc11 boards… Do you think they would help you? It probably takes up >>> less space than a cap, resistor and MOSFET... >>> >>> I haven’t gotten around to building the QUAD yet so I cannot testify to >>> say if the reset circuit helped... >>> >>> -atsushi >>> >>> >>> >>> Begin forwarded message: >>> >>> *From: *Stephen Adolph <[email protected]> >>> *Subject: **[M100] QUAD update.* >>> *Date: *November 5, 2017 at 9:36:44 AM EST >>> *To: *Model 100 Discussion <[email protected]> >>> *Reply-To: *[email protected] >>> >>> Letting the list know that I have found a couple of defects with QUAD V4 >>> which I did 2 years ago. Here's the defects I found. >>> >>> 1) I did not protect the bank switching function adequately. The M100 >>> OS will periodically write to ports 80h, 82h and 83h wrt the DVI. This can >>> cause V4 QUAD to change banks. >>> >>> 2) The power up/power down behaviour wasn't adequately protected, and >>> there was a chance that RAM could be corrupted and/or banks switched on >>> power transients. >>> >>> 3) I was using the wrong timing to provision banks. >>> >>> Not too good. In fact I believe this is the source of the frustrations >>> I was having integrating QUAD with REX Manager. >>> >>> >>> The good news is that I have prototyped a QUAD V5 which addresses these >>> defects. The changes: >>> * I have added a MOSFET based "activity switch" that allows RAM and bank >>> switch protection on power transients >>> * I have improved the bank selection circuitry to be robust on power >>> transients. >>> * I have changed the bank switching commands to make the mechanism more >>> robust. >>> * bank switch state is now preserved during power transients. >>> >>> I'll report back on how well these changes work out when I get boards >>> back and have them tested. >>> >>> In the meantime, I've taken QUAD V4 off of OSHPARK. >>> >>> cheers >>> Steve >>> >>> >>> >> > >
