Wow, Steve what great detective work. I love thigs like this, when one spends ages trying to figure out why something was designed a certain way and then you have that ‘Aha!’ moment. A very good example of the art of engineering…
Jeff Birt From: M100 <[email protected]> On Behalf Of Stephen Adolph Sent: Saturday, June 18, 2022 8:46 AM To: [email protected] Subject: [M100] the function of A* in M100/T102 I've often wondered about the purpose of the A* signal on the M100. A* is used to control the internal RAM. It drives the timing for the RAM chip selects. Also, since the RAM are wired with OE grounded, whenever A* is high, the RAM will try to immediately output data, unless the processor is writing data to it. A* is logically the NAND of /WR and /RD. A* is '1' whenever a read or write is happening. So the ram chip selects never get enabled until well into the processor cycle, far later than it could be based on IO/M and address lines. To me this has always been a bit peculiar. Chip selecting, and the function of reading or writing have separate timings and can be done separately. Also, I think A* is used to enable "external RAM" on the M100. I think that is how the PG Designs ram bank products work for example - by controlling A*. So, why did the M100 designers choose to delay the chip select for the RAM? As I have been playing around with 5MHz hacking on these things I have found that, in order to speed up the computer, one has to fiddle with A*. Generally, A* has to be enabled EARLIER in the processor cycle in order to give the RAM time to respond at the higher speed. I've noticed that the computer power consumption is quite sensitive to the actual timing of A*. The earlier I enable A*, the higher the current. Here's some numbers: At 2.5 MHz (stock speed) the RAM in my M100 consumes about 2.3 mA out of the 50 mA of the machine overall. This is with a "stock" A* signal. In the extreme case of setting A* permanently on (hard wired to 5V) , at 5MHz the RAM current shoots up to 20mA! and the M100 is consuming 85 mA. (not great right?) If I do a bit of work, I can generate an A* signal that minimizes RAM current to 4.3 mA while operating at 5MHz. Much better! this keeps the overall M100 power to <70mA @5MHz. Re-reading various datasheets, and thinking about memory power ... I think the M100 hardware designers were using A* to significantly limit the amount of time that the RAM chips were enabled. By doing so, they dramatically reduced the overall memory power. This of course makes sense for a battery powered computer. This was an interesting ah-hah. In retrospect, it makes perfect sense once you realize that "on" time is driven by chip-select and that drives power. And the result of all this twiddling is that my 5MHz hacks are quite a bit lower power. I have some new PCBs on the way. These boards piggy back on the CPU, and provide the faster clock. Now they also generate a new A* signal for the RAM. In terms of computer power, I expect the following. 1) for a FIXED (ie permanent) 5MHz conversion, the increase in current should be 18mA 2) for a SWITCHABLE conversion, the increase in current should be 3mA in 2.5M mode and 21 mA in 5M mode. Standard system RAM is usable in both T102 and M100. The only memory part that needs to be changed is the M100 ROM, which is very very slow. So 5MHz must have an EPROM conversion or similar.
