Did you increase the number of processors in your simulated system to
match the number of processors you told the application to use? The
thread calls in M5 don't do any real thread scheduling; they only work
if the number of threads == the number of CPUs. I'm not sure that's the
problem you're having, but it could be.
You could also just uncomment that print statement (in
arch/alpha/alpha_tru64_process.cc) and see if it is actually making
forward progress.
Steve
Aater Suleman wrote:
Hi Lisa,
Thanks for your help. I was able to run SPLASH to in the SE
mode. I was busy with my project and hence did not respond earlier.
I still have one problem. I am unable to run some of the benchmarks with
four or more processors. I see an output like the following on screen
and the execution never terminates:
.
.
.
cpu2: nxm_block 11de7092c 1 0 0 1
cpu3: nxm_block 11f2906dc 1 0 0 1
cpu2: nxm_block 11de7092c 1 0 0 1
cpu3: nxm_block 11f2906dc 1 0 0 1
cpu2: nxm_block 11de7092c 1 0 0 1
cpu3: nxm_block 11f2906dc 1 0 0 1
.
.
This happens in case of several benchmarks. Can you please advise. I
will appreciate it.
Thanks,
Aater
On Thu, 8 Dec 2005, Lisa Hsu wrote:
I believe you can get them at
m5.eecs.umich.edu/dist/splash-alpha.tgz
lisa
On 12/8/05, Aater Suleman <[EMAIL PROTECTED]> wrote:
Hi,
I am trying to run the Splash2 in M5. I have decided to use the SE
instead of FS in the favor of time so I am planing to use the setup
files
included in the distribution as is. I do not have the actual compiled
binaries that the setup requires. Can you tell me where I cna get them?
Aater
On Thu, 1 Dec 2005, Kevin Lim wrote:
Hey Aater, good to hear from you. Hopefully school is treating you
well.
As far as I know, the splash2 benchmarks we have are non-full
system. If
you
compile the one of the ALPHA_SE binaries, then you can run the
benchmarks.
I'm not particularly sure of which benchmarks would be suitable for
full-system cache coherence testing, or if we have any. As far as m5
help in
general, if you e-mail [email protected], those e-mails
will
go to our entire group.
Kevin
Aater Suleman wrote:
Hey Kevin,
I hope everything is going great at your end. I need some help with
the
m5
simulator so I decided to contact you. I will appreciate if you can
help me
or refer me to someone who will be able to answer my questions.
I am trying to use m5 simulator to do some full-system simulations. I
want
to be able to setup some multi-threaded workloads (like Splash) inside
Linux and then try out performance of some cache coherence protocols.
I was able to compile and test the simulator after some effort. I can
run
the tests under m5-test directory but I am unable to run the stuff
under
ALPHA_FS/configs/ directory. I have been playing around with the
Splash
workloads in there.
I tried to run the simulator with 2 cpus in Simple system mode with
the
following command line:
ALPHA_FS/m5.opt -ENP=1 -ESYSTEM=Simple -EBENCHMARK=Cholesky
../configs/splash2/run.py
But I got the following error:
Traceback (most recent call last):
File "./config.py", line 3921, in ?
m5execfile('../configs/splash2/run.py', globals())
File "<embed: m5/python/m5/__init__.py>", line 42, in m5execfile
File "../configs/splash2/run.py", line 9, in ?
BaseCPU.workload = Parent.workload
File "<embed: m5/python/m5/config.py>", line 277, in __setattr__
AttributeError: Class BaseCPU has no parameter workload
I got rid of this error by commenting out the line BaseCPU.workload =
Parent.workload in the file splash2/run.py. I think this was not the
right
thing to do but after commenting out those line I saw was the
following
error:
Error in unproxying param 'system' of cpu0
Traceback (most recent call last):
File "./config.py", line 3923, in ?
instantiate(root)
File "<embed: m5/python/m5/config.py>", line 1270, in instantiate
File "<embed: m5/python/m5/config.py>", line 458, in print_ini
File "<embed: m5/python/m5/config.py>", line 446, in print_ini
File "<embed: m5/python/m5/config.py>", line 556, in unproxy
AttributeError: Can't resolve proxy 'any' from 'cpu0'
Can you help me understand this problem. I will highly appreciate it.
Regards,
Aater
--
Muhammad Aater Suleman
Dept. of Electrical and Computer Engineering
The University of Texas at Austin
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