> I'm trying to use the Sampler module to switch between functional
> and performance simulation using phase analysis approaches like
> SimPoint (UCSD).  I am trying to us the Sampler module in ALPHA_SE
> mode, but am not sure how to write the configuration files.  

First off I'm not sure this is supported with the current m5 release.
sampler.cc:167 says:

//We can't switch back from detailed yet, just finish sampling
//Temporary stop-gap

when trying to switch from phase1 back to phase0.


Since sampling seems to have resulted in some confusion on the list I'll
write up what I've managed to work out so far. To use the sampler you
need to instantiate it like:

root.sampler = Sampler(phase0_cpus = [root.cpu0], phase1_cpus =
[root.cpu1], periods = [1e7, 2e7])

in your config file. The first period tells you how long phase0 will
last, the second period is how long phase1 will last. The intention is
to revert back to phase0 after phase1 but right now the code just exits
simulation cleanly. The critical bit you need to do is ensure the two
CPU models are hooked up to the same memory system and are running the
same workload. The way I'm doing this is by instantiating the memory
items and the workload in the root object as follows:

root=Root() 
root.toL2Bus    = ToL2Bus()
root.toMemBus   = ToMemBus() 
root.dcache     = DL1(out_bus=Parent.toL2Bus) 
root.icache     = IL1(out_bus=Parent.toL2Bus)
root.l2         = L2(in_bus=Parent.toL2Bus, out_bus=Parent.toMemBus)
root.ram        = SDRAM(in_bus=Parent.toMemBus)

I then instantiate the CPU models as:

root.cpu0 = MySimpleCPU()
root.cpu1 = MyDetailedCPU()

Inside the definition of MySimpleCPU and MyDetailedCPU (based on
SimpleCPU and DetailedCPU respectively) the icache and
dcache attributes are set to Parent.icache and Parent.dcache

I then instantiate the sampler as above. Finally I instantiate the
workload:

bm      = Benchmarks.GzipSource() 
root.cpu0.workload = bm
root.cpu1.workload = bm


I'm not 100% convinced this is the correct way and I might have
forgotten some details but from some quick simulations this morning it
seems ok. Can post my full config files if you like,

Hope this helps,

James


-- 
[EMAIL PROTECTED]
http://www.cl.cam.ac.uk/~jrs53/


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