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Hi,
I've been working with M5 for the semester.
But I can't seem to get past this one error I'm having right now.
I've been trying to modify M5 to operate with a
cache structure that is exclusive instead of the current
semi-inclusive
version that is implemented. I'm also doing
this for a CMP design, btw.
My main problem is that I'm occasionally getting a
seg fault when handling a response to memory. I get a MemReqPtr
coming
back on the bus, but the problem is that the MSHR
its pointing to has been de-allocated already by I assume some
other
request that went on the bus before it. Which
is strange, I can't seem to find where this could
potentially happen. I tried just looking for this case and throwing out
the request, but its leading to other bizarre
errors. One has the coherence policy (I'm using MSI) return a -1 for the
new state. Now I'm also getting asserts of : In Cache<>::getMemReq{
....
asset(!doMasterRequest() ||
missQueue->havePending())
} being thrown.
My only modifications have been: When a
request comes back from memory, the L2 forwards the response to the requesting
L1 without
allocating anything in the L2 (Modifies
Cache::handleResponse() to do this). The L1s write back any evicted block
(modify CacheTags::doReplacement()).
The L2 will allocate any incoming writeback, this
is done by adding a handleFill() to Cache::access() in the event a Writeback
request is seen and therefore
sometimes the while(!writebacks.empty(){} peice of
code is run when a writeback evicts an older block. The L2
invalidates any block it hits on and
responds to (calls InvalidateBlk() in the access function after calling
respond()).
When I run the code with these modifications turned
off, everything is happy. Otherwise it fails about 10 minutes into a
simulation run with one
of these errors, there's probably more that can
happen, but these are all I have seen so far. Every so often though an
Exclusive cache simulation will succeed, but that seems to be the product of
everything lining up just right and not hitting
these corner cases I've seemed to have exposed.
Does anyone have any ideas as to where I could
look to try and find this bug(s) I've somehow added? I've tried tracing
the code to see if I haven't
accounted for some case that assumes inclusion, but
I haven't seen anything that would potentially do this. I'm just not
familiar enough with the code to be able to know how much it assumes and how much its correct operation depends on the
assumptions it makes.
Thanks,
Geoff Blake
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