i have a few newbie questions regarding the Timing Simple CPU(SE mode).
I've been analyzing the CPU model from the ground up. I've seen BaseSimpleCPU::preExecute() and BaseSimpleCPU::postExecute() in base.cc(in the BaseSimpleCPU class, file m5/src/cpu/simple). My first question is, where does the *actual* execution happen? It seems to me that all that TimingSimpleCPU adds to BaseSimpleCPU are the cache ports.
Also, in m5/src/cpu/simple/base.cc, under BaseSimpleCPU::preExecute(), could you explain in more detail the lines
// decode the instruction inst = gtoh(inst); how does gtoh decode the instruction? What exactly does gtoh do? By the way I'm using M5 2.0b3 Thanks a bunch. Help would be greatly appreciated. Happy Holidays everyone! -------- "Gradatim Ferociter." _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
