The interconnection between cpus that M5 currently uses is a snoopy bus. Unfortunately, there is no other way to interconnect CPUs. Though as of M52.0b4, you can construct a hierarchal bus structure, ie: 4 CPUs, each pair of cpus shares an L2, and coherence is done among the local and remote pair, similar to how an Intel quad core is setup. (Someone please correct me if this not correct.)
Geoff From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Zhang Yu Sent: Friday, January 11, 2008 4:08 PM To: [email protected] Subject: [m5-users] Interconnection between multiple processors Hi, I want use the full system mode booting with multiple processors to run some MPI programs. I was wondering how the processors are connected to each other. Since in the configuration, the only thing I could do is to set the number of cpus. Is there a default interconnection network between these cpus? Or there is no interconnection at all but only a shared memory? I want to know how the cpus communicate with each other and how I can get control of the communication. Thanks, Yu No virus found in this incoming message. Checked by AVG Free Edition. Version: 7.5.516 / Virus Database: 269.19.0/1216 - Release Date: 1/9/2008 10:16 AM No virus found in this outgoing message. Checked by AVG Free Edition. Version: 7.5.516 / Virus Database: 269.19.0/1216 - Release Date: 1/9/2008 10:16 AM
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