How hard would the timing version be to do? The need to flush the
cache has come up many times Could you just have a little engine that
connects to a cache port, issuing writeback commands? (And presumably
blocking the other cache port).
On Jan 16, 2008 8:49 PM, Steve Reinhardt <[EMAIL PROTECTED]> wrote:
> If you're not interested in keeping the timing realistic, you could
> just iterate over all the blocks and set the valid bit to 0, making
> sure to write the dirty ones back to memory with functional writes.
> The blocks themselves are in the tags classes, e.g., tags/lru.{cc,hh},
> so you'd probably want to put the function there (and call it from
> Cache<TagStore> in cache.hh/cache_impl.hh).
>
> If you want to be more realistic with timing, then it's trickier, as
> you'd have to issue timing writebacks, and be able to stall and
> reschedule when the writeback buffer gets full, etc... I'll just hope
> that's not what you want.
>
> There's no code to do this currently though, you'll have to write it yourself.
>
> Steve
>
>
> On Jan 16, 2008 12:54 PM, Nicolas Zea <[EMAIL PROTECTED]> wrote:
> > What would be the best way to go about scrubbing part or all of a
> > cache? Is there a method already implemented for this? If not, which
> > cache files and functions might I look into to support this?
> >
> > Thanks,
> > Nick
> > _______________________________________________
> > m5-users mailing list
> > m5-users@m5sim.org
> > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
> >
> _______________________________________________
> m5-users mailing list
> m5-users@m5sim.org
> http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
>
>
_______________________________________________
m5-users mailing list
m5-users@m5sim.org
http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
