Hi, I saw there is a PTP (IEEE-1588) description in the following OCP document: https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/0f94050c633d282949069754c1446a401eb1f38a.pdf
And there is an block diagram in it like this: [cid:[email protected]] Few questions for this architecture: 1. On which hardware platform is this application stack been applied to? 2. For applying such application, is any specific interface defined for “Clock driver” and “HW Clock” implementation? thanks <hr> This email and any attachments are intended for the sole use of the named recipient(s) and may contain confidential, proprietary, privileged or copyrighted information. If you are not the intended recipient, please delete immediately. Do not read, copy, or forward this email or any attachments. <hr> -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: Every message in topics or hashtags you are following is emailed to you. The first message of every new thread is also emailed to you. You automatically follow any topics you start or reply to. View/Reply Online (#48): https://OCP-All.groups.io/g/main/message/48 Follow This Topic: https://groups.io/ft/31911444/21656 Group Owner: [email protected] Unsubscribe: https://OCP-All.groups.io/g/main/leave/3379668/1315919792/xyzzy [[email protected]] -=-=-=-=-=-=-=-=-=-=-=-
