Hi Jim, ...

On Fri, Mar 15, 2013 at 02:37:31PM -0400, [email protected] wrote:
> Arthur,
> 
> I integrated our flash model into the IDE code in marss last year.

Thanks!  This looks very close to what I'm looking
for.  I'll check it out...

Arthur

> 
> The modified version of marss is here...
> https://github.com/jimstevens2001/marss.dramsim/tree/ssdsim
> 
> The SSD model used is:
> https://github.com/jimstevens2001/PCI_SSD
> 
> Previously, marss had the ability to do a constant delay for disk IO
> (although I believe this was commented out by default). My mod changes
> this constant delay to a variable delay based on the result of the SSD
> simulation. It accomplishes this by extracting the disk request
> information and DMA scatter/gather lists from QEMU and forwarding them to
> the PCI_SSD module. PCI_SSD is responsible for simulating the host
> interface and acting as a DMA controller. The actual flash simulation
> (FTL, ONFi channels, flash latencies) occurs in the NVDIMM module. At the
> end of the process, PCI_SSD raises the IDE IRQ to tell Linux the request
> has finished.
> 
> Let me know if you have any questions.
> 
> Jim Stevens
> Memory Systems Research Lab
> University of Maryland, College Park
> 
> 
> 
> > Hi All,
> >
> > I'm just trying marss out and it looks very nice!
> > Looking through the archives, it looks like at one
> > point there was some work done to get flash/disksim
> > integrated.  Was that work ever completed?  Are there
> > patches around somewhere?
> >
> > Thanks,
> >
> > Arthur
> >
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> >
> 
> 
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