Hi Karthik, 1) Yes, something like this would certainly be possible with MARSS.
2) I don't have a remote terminal available at the moment, but if memory serves, you'll actually want to look at the qemu code responsible for changing the frequencies. grep -ri for DVFS or look at the commit logs and the relevant code should pop up. You'll likely have to make a few small changes to the Context class (adding a few variables and such). You'll also need to look at where BaseCore::cycle() is called and change around the code a bit there to account for frequency transition delays. Tyler > Hi Tyler, > > Thanks for the quick reply. I have a couple more related questions: > > 1) Is it possible to find the frequency at which an instruction is > executed? (e.g frequency when an atomic instruction is executed) > 2) Since I am trying to understand the code > a) any recommendation on tools for code walk through? > b) which part of the code to begin? (seems like BaseCore class but > any hint is appreciated) > > Regards, > karthik > > > On Sun, May 19, 2013 at 5:07 PM, <[email protected]> wrote: > >> Hi Karthik, >> >> 1) I modified the qemu BIOS image and embedded DVFS-related data into >> the >> ACPI tables. These ACPI tables are responsible for reporting information >> to the OS like maximum transitional latency. Note, however, that even >> though the ACPI tables report 107us, the simulated transition frequency >> is >> instant or 0us. >> >> 2) Yes, you can. But you will have to implement this functionality >> yourself. As of now, I simulate anything less than maximum frequency by >> not calling cycle() on some of the BaseCores classes as necessary to >> achieve the desired effect. But any adjustments to the frequency are >> applied immediately. You would have to implement a mechanism that sets >> the >> actual frequency after some number of cycles (a BaseCore class variable >> like cyclesUntilFrequencyChange and targetFrequency, both set on >> frequency >> change and checked on every Machine::cycle() would do the job. >> >> Tyler >> >> > Hi Tyler, >> > >> > I could successfully simulate DVFS using your patch and the older >> MARSS >> > repository. Thanks for your help. >> > >> > I have a couple of questions based on the experimental results: >> > >> > 1) When I run cpufreq-info command in the simulated guest machine I >> get >> > the >> > "maximum transition latency" to be 107 us. Can you explain how this >> delay >> > comes into picture as you did not add any delay in your patch? >> > >> > 2) Is it possible to simulate latency to 10s of us or even 10s of ns? >> > >> > Thanks for your time, >> > karthik >> > >> > >> > >> > On Tue, Mar 26, 2013 at 5:09 PM, karthik vm <[email protected]> wrote: >> > >> >> Hi Tyler, >> >> >> >> Thanks for your informative and quick reply. It also gives a clear >> >> pointer >> >> to start my work. >> >> >> >> I think for my work I also need to simulate the frequency switch >> delay. >> >> Also I need to see how to group the cores in sets and to increase or >> >> decrease the frequency of the set. >> >> >> >> But to start with I am trying to simulate your older work and to >> check >> >> whether it will be helpful to my project needs.Thanks a lot for your >> >> guidance. I will keep you posted. >> >> >> >> Regards, >> >> karthik >> >> >> >> >> >> >> >> >> >> >> >> On Mon, Mar 25, 2013 at 6:52 PM, <[email protected]> wrote: >> >> >> >>> Hi, >> >>> >> >>> I made the modifications to MARSS to do this quite some time ago... >> >>> though, it seems it never got merged in anywhere...? Anywho, the >> patch >> >>> and >> >>> a BIOS modification can be found here: >> >>> http://cs.binghamton.edu/~tstache1/marss/marss-dvfs.tgz >> >>> >> >>> It might not apply cleanly anymore; YMMV. That being said, I wrote >> it >> >>> about a year ago, so it shouldn't be that much trouble to shoehorn >> it >> >>> back >> >>> in. If you manage to do so, please make a patch against master and >> I'll >> >>> gladly apply it to our features branch. >> >>> >> >>> Barring that, I also uploaded a full-working copy of the MARSS >> >>> repository >> >>> I was using at the time. That being said, it's well-behind the >> current >> >>> master and does not have all the bug-fixes/progress/features we made >> >>> over >> >>> the last year. I'd highly suggest trying to merge it with the >> current >> >>> master if you go this route. That repository can be found here: >> >>> http://cs.binghamton.edu/~tstache1/marss/.nobackup/MarssDVFS.tgz >> >>> >> >>> Couple notes: >> >>> * The ACPI tables have to be hard-coded into the BIOS image. I >> modeled >> >>> some AMD processor (forgot which); you may need to adjust the BIOS's >> >>> tables if you wish to model some other processor or wish to change >> the >> >>> # >> >>> of gears/frequencies. >> >>> >> >>> * I did not write this with Turbo Boost/Core in mind. >> >>> >> >>> * I did not implement a frequency switch latency/delay; any changes >> >>> take >> >>> effect as soon as the relevant MSRs are written. It shouldn't be >> much >> >>> work >> >>> to sort this out if you have the need for the additional accuracy or >> >>> switch frequencies often. >> >>> >> >>> * I assume that each core has it's own clock domain. This is not >> true >> >>> of >> >>> most processors today. >> >>> >> >>> * You might need to manually modprobe the 'powernow-k8' module to >> get >> >>> things going on some distros. >> >>> >> >>> Regardless, after you get it up and running, the stats should >> include >> >>> information about how much time you spent in each frequency domain, >> >>> etc. >> >>> >> >>> Tyler >> >>> >> >>> > Hi All, >> >>> > >> >>> > I am working on a project where I need to dynamically change the >> >>> frequency >> >>> > of the cores in a multi-core machine. I am trying to develop a >> custom >> >>> > In-kernel governor using the kernel Cpufreq infrastructure in >> Linux. >> >>> I >> >>> > have >> >>> > few questions: >> >>> > >> >>> > 1) Can I simulate DVFS in MARSS? (I found a previous post from >> Avadh >> >>> which >> >>> > says 'yes' but it would be great to have more explanation on this >> as >> >>> I >> >>> am >> >>> > basically a OS guy) >> >>> > 2) Can I simulate DVFS in MARSS in such a way that each core can >> run >> >>> at >> >>> > different frequency in a simulated multi-core chip? >> >>> > >> >>> > It would be great if someone could point me in the right >> direction. >> >>> > >> >>> > Thanks for your time, >> >>> > karthik >> >>> > _______________________________________________ >> >>> > http://www.marss86.org >> >>> > Marss86-Devel mailing list >> >>> > [email protected] >> >>> > https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel >> >>> > >> >>> >> >>> >> >> >> > >> >> >> > _______________________________________________ http://www.marss86.org Marss86-Devel mailing list [email protected] https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel
