I had a chance to check it out, line voltage stabiliy index, using some test systems, but there were some cases where at the critical point the value of the index are not exact 1.00. For the two bus example, the line is used only feeding power to the load, but in real systems there might be kind of circulating current, like getting through the line but some power of it turning back to the sending end through another route. I thought line VSI may have a limitation. But there might be another reason that stems from the simplification or the ignoring the reactive powe limit of the source, maybe.
Regards! This is from my iPhone. Email: [email protected] 2012. 7. 6. 오전 11:18 Parag Patel <[email protected]> 작성: > > ok actually i am a btech student and my project in final year was to study > the impact of FACTS controllers in improving power system performance. for > that i calculated loading limit once without FACTS controllers and then with > the FACTS controllers implemented. m giving the step wise method, i acn give > u flowchart as well for calculating the loading limit and also coding if u > want. > firstly i formulated voltage indices. there can be several voltage indices > like FVSI, Line stability Factor, etc. in these we formulate a quadratic > equation in the form of real power , voltage or reactive power, and put the > determinant condition greater tham zero for real solution and thus we get a > condition for stability. i used FVSI to check the stability. you can get more > information about voltage indices by referring to a IEEE paper 'On-line > voltage stability based contingency ranking using fast voltage stability > index (FVSI)' . FVSI is calculated for line not bus. i took one bus at a time > and increased its reactive power demand. i was mainly concerned with reactive > loading limit as it is main cause for voltage collapse. i increased reactive > power demand on a bus and at each step i calculated FVSI for each line. > forgot to tell that FVSI has to be less than 1 for stability by determinant > condition(quadratic eq that i found in terms of voltage). so if at any step > the FVSI for any line (generally it is the line connected to the concerned > bus) was found greater than 1 that was the loading limit of that bus. the > process was repeated for each load bus. dont know if i have been able to > convey the information. can help further and looking for discussion , > although i am just an average student :) > with regards , > Parag Patel > >
