There’s also a graphical view along with a predictor of where the numbers 
converge to in future years:

https://people.eecs.berkeley.edu/~rcs/research/interactive_latency.html

Sent from my iPhone 📱

> On 25 Sep 2017, at 14:18, Richard Warburton <[email protected]> 
> wrote:
> 
> Hi,
> 
> I don't know if Martin has another version, but a commonly published version 
> of these numbers is actually a github gist that Jonas Boner has published:
> 
> https://gist.github.com/jboner/2841832
> 
> 
> 
>> On Mon, Sep 25, 2017 at 10:29 AM, 'Rupert Smith' via mechanical-sympathy 
>> <[email protected]> wrote:
>> In one of Martin Thompsons talks he gave an overview of the pyramid of 
>> speed, working from CPU registers out to remote storage, showing how storage 
>> classes along the way get progressively slower to access. He also gave some 
>> approximate numbers to each storage class, but I can't find a document 
>> online that contains this information, or the right section of one of his 
>> talks on youtube to extract this from. Can anyone help me fill in the Xs in 
>> the table below? Obviously it depends on the exact hardware, but approximate 
>> figures will do, its just to illustrate a point and get a feel for how this 
>> scale operates. Thanks.
>> 
>> CPU Register - X nanoseconds
>> L1 Cache - X nanoseconds
>> L2 Cache - X nanoseconds
>> L3 Cache - X nanoseconds
>> RAM - X nanoseconds
>> Local Storage - X milliseconds
>> Remote Storage - X milliseconds
>> 
>> 
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> 
> 
> -- 
> regards,
> 
>   Richard Warburton
> 
>   http://insightfullogic.com
>   @RichardWarburto
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